1. Field of the Invention
The present invention relates to a memory controller, a system including the memory controller and a memory delay amount control method.
2. Description of Related Art
In order to write data into an external memory or read data from the external memory, a memory controller for adjusting the amount of delay is required for a system LSI and the like. JP-A-2007-12166 discloses a technique in which delay adjustment of a Double-Data-Rate (DDR) memory is performed by causing the DDR memory to read and write a test pattern prepared in advance.